This invention relates to DC/DC converters and more particularly to a frequency control circuit for regulation of an inductorless DC/DC converter.
Unregulated inductorless DC/DC converters (i.e. charge pumps) are used to double, triple, or invert a voltage that is supplied to the converter. These converters, however, do not generate a constant output voltage. An exemplary unregulated converter comprises a clock generator or oscillator and an array of power switches. FIG. 1A, for example, shows a prior art unregulated voltage doubler 10. The voltage doubler 10 is coupled to a clock generator, as shown in FIG. 1B, which generates a signal A and B that serve as inputs into the voltage doubler 10. These signals will turn the multiple transistors M1, M2, M3, and M4 on as needed to double the voltage Vin. When transistors M2 and M1 are turned on (i.e. during phase A when the signal is high), the capacitor Cf will be charged to the voltage Vin. When transistors M3 and M4 are turned on (i.e. during phase B when the signal is high), the capacitor Cf, which is already charged to the voltage Vin, will be put in series to the input voltage, Vin and the output capacitor, Cout will be charged up to twice the voltage Vin.
In order for the converter to work most efficiently and to be cost effective, there are four independent requirements that must be met. These requirements include 1) a small internal resistance (i.e. a low voltage drop at full load), 2) a low output voltage ripple at full load, 3) a low quiescent current, and 4) small and inexpensive external components (i.e. capacitors). The internal resistance Ri2 of an inductorless transistor SC voltage doubler can be calculated as:                               R          i2                =                              1                                          C                f                            ⁢                              xe2x80x83                            *                              xe2x80x83                            ⁢                              f                clk                                              +                      xe2x80x83                    ⁢                      2            ⁢                          xe2x80x83                        *                                          ∑                                  i                  =                  1                                4                            ⁢                              R                Mi                                                                        (        1        )            
were Cf=pump or xe2x80x9cflyingxe2x80x9d capacitor, fclk=clock frequency, and RMi=ON-resistance of switch Mi. Thus, to minimize the internal resistance Ri2, a high clock frequency fclk and/or a large flying capacitor Cf is needed. The output voltage ripple is represented by:                               V          RIPPLE                =                              1                          2              ⁢                              xe2x80x83                            *                              xe2x80x83                            ⁢                              C                OUT                            ⁢                              xe2x80x83                            *                              xe2x80x83                            ⁢                              f                clk                                              *                      xe2x80x83                    ⁢                      I            LOAD                                              (        2        )            
where VRIPPLE=ouput voltage ripple, COUT=output capacitance, and ILOAD=load current. To minimize the output voltage ripple, then, a high clock frequency and/or a large output capacitance is needed.
Since the Power MOSFETS in the converter periodically have to change states, their gates periodically need to be charged and discharged. The gates of all power transistors in the converter can be seen as a capacitor which needs to be charged to the input voltage and discharged to ground. When a capacitor is charged from zero to any other voltage, half of the energy gets lost. Compared to an inductive converter, a Charge Pump has higher switching losses from the gate capacitances of the power transistors, since there are more transistors to control. These losses are represented by a quiescent current:                               I          Q                =                              (                                          V                IN                            *                              xe2x80x83                            ⁢                              f                clk                                      )                    ⁢                      xe2x80x83                    *                      xe2x80x83                    ⁢                                    ∑                              i                =                1                            4                        ⁢                          xe2x80x83                        ⁢                          C              Mi                                                          (        3        )            
To minimize the quiescent current, a low clock frequency is need. However, the low clock frequency needed to minimize the quiescent current is counter to the high clock frequency which is needed to minimize the internal resistance and the voltage ripple. Thus, it is impossible for the prior art to fulfill all four requirements because prior art devices run at a constant frequency.
In the prior art, designers have generally compromised on the conflicting performance characteristics and offered their devices with different operating frequencies, for example 1, 10, 50, and 100 khz. Thus, consumers must choose to fulfill certain of the requirements while forfeiting others. For example, consumers can typically obtain the first three requirements but at the expense of very costly, large external capacitors which allow a small operating frequency. If the quiescent current IQ is not an issue, then high frequency versions with small external capacitors can be utilized. If internal resistance and voltage ripple is not an issue, low frequency versions with small external capacitors can be used, an example of which is the MAX 828 or a like device. Thus, what is needed is a design that will provide efficient and cost effective operation by meeting all four of the requirements.
These and other problems are generally solved or circumvented, and technical advantages are generally achieved, by the present invention that is a frequency control circuit for unregulated inductorless DC/DC converters.
In a preferred embodiment method of the present invention, an unregulated inductorless direct current to direct current converter comprises a first voltage-to-current converter configured to convert a first voltage to a first current and a second voltage-to-current converter configured to convert a second voltage to a second current. A regulation circuit is coupled to the first and second voltage-to-current converters and configured to generate an output current proportional to the difference between the first and second currents. The unregulated inductorless direct current to direct current converter further comprises a variable frequency oscillator coupled to the regulation circuit, the oscillator receiving as a control current the output current therefrom and outputting a clock signal having a frequency proportionate to the control current; and an output stage coupled to receive the clock signal and receiving an input voltage and outputting an output voltage, the output voltage and the input voltage having a ratio that is determined by the clock signal.
One advantage of a preferred embodiment of the present invention is that it provides a variable frequency to provide for small internal resistance, low output voltage ripple and quiescent current while allowing for small external capacitors.
Another advantage of a preferred embodiment of the present invention is that it defines a frequency sweep range that increases efficiency and decreases power loss.
Yet another advantage of a preferred embodiment of the present invention is that it provides for a cost effective device by allowing for the use of cheaper external components.
A further advantage of a preferred embodiment of the present invention is that it can flexibly operate with a variety of external components.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter, which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the concepts and specific embodiments disclosed may be readily utilized as a basis for modifying or designing other structures or processes for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the spirit and scope of the invention as set forth in the appended claims.